Edited by: J. Joshua Yang, University of Southern California, Los Angeles, United States
Reviewed by: Massood Atashbar, Western Michigan University, United States; Abhay A. Sagade, SRM Institute of Science and Technology, India
This article was submitted to Nanodevices, a section of the journal Frontiers in Nanotechnology
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Resistive switching (RS) devices, also referred to as resistive random access memories (ReRAMs), rely on a working principle based on the change of electrical resistance following proper external electrical stimuli. Since the demonstration of the first resistive memory based on a binary transition metal oxide (TMO) enclosed in a metal–insulator–metal (MIM) structure, this class of devices has been considered a key player for simple and low-cost memories. However, successful large-scale integration with standard complementary metal–oxide–semiconductor (CMOS) technologies still needs systematic investigations. In this work, we examine the beneficial effect titanium has when employed as a buffer layer between CMOS-compatible materials like hafnium dioxide and tungsten. Hindering the tungsten oxidation, Ti provides RS stabilization and allows getting faster responses from the devices. Through an extensive comparative study, the effect of both thickness and composition of Ti-based buffer layers is investigated. The reported results show how titanium can be effectively employed to stabilize and tailor the RS behavior of the devices, and they may open the way to the definition of new design rules for ReRAM–CMOS integration. Moreover, the gradual switching and the response speed tunability observed employing titanium might also extend the domain of interest of these results to brain-inspired computing applications.
Devices with tunable electrical resistance find application in information and communication technologies (ICTs) since the end of the 19th century, when the so-called coherer was employed as receiver in Marconi's wireless telegraph (Marconi,
where
In view of the upcoming CMOS integration, tungsten turns out to be a feasible choice for the oxidizing electrode due to its already established employment for vertical interconnect accesses (VIAs). However, when used in direct contact with an oxide, its multiple and metastable oxide forms introduce relevant instability in the memory cell performances, so that the insertion of a buffer layer becomes necessary (Shahrabi et al.,
In this work, a systematic study of the effect of titanium-based buffer layers enclosed between a tungsten electrode and an oxide layer is carried out on RS devices exhibiting hafnium oxide (HfO2) as the insulating layer of the MIM structure and platinum as the inert electrode. The role played by Ti in modulating the interaction between the oxidizing electrode and the oxide is investigated through an extensive, comparative investigation of devices with buffer layers having different thicknesses and different compositions. Devices without a buffer layer, namely with the tungsten electrode in direct contact with the HfO2 film, are also tested and kept as performance references. A clear effect of thickness is observed in both static and dynamic operations, with lower and tunable forming, SET and RESET voltages, better endurance, and faster response achieved through a thicker Ti-based buffer layer. Especially, with respect to devices without any buffer layer, the early HRS failure is fixed and pulses down to three orders of magnitude shorter can be employed. These results, coupled with gradual RESET transitions, make the Ti buffer/W electrode stack a versatile candidate for CMOS-compatible ReRAM cells to be employed in brain-inspired applications.
For our devices, a cross-point geometry was adopted, with VIA openings defining the active region of the ReRAM cells. Using a standard 4-in. Si wafer with a 500-nm-thick SiO2 layer as a substrate, platinum electrodes were first defined, starting with sputtering deposition of a 5-nm-thick titanium adhesion layer and a 125-nm-thick Pt film by a Pfeiffer Spider 600. Patterning was then performed through photolithography and dry etching, carried out with an STS Multiplex ICP etcher. Afterwards, in order to assure electrical isolation between the electrodes, a 100-nm-thick low thermal oxide (LTO) was deposited at 425°C by means of low-pressure chemical vapor deposition (LPCVD). Once the Pt electrodes were patterned and isolated, VIA openings of different sizes were defined across the LTO passivation layer performing photolithography and buffer oxide etch (BOE). Thereafter, HfO2 and the Ti-based buffer layers were deposited, the latter with thickness varying sample by sample (1, 3, and 5 nm) and the former always 5 nm thick. Concerning the oxide, atomic layer deposition (ALD) at 200°C was performed by means of a BENQ TFS200, while the buffer layers were deposited by room temperature sputtering, with an Alliance Concept DP650, employing two different targets: pure titanium (99.9995%) and mixed titanium–tungsten (99.99% of purity with 10% in weight of Ti). By means of the same sputtering tool, the tungsten electrode and a titanium nitride capping layer were then deposited, with thicknesses of 60 and 15 nm, respectively. Finally, to pattern the electrode and define the arrays of cross-point cells, photolithography and dry etching were performed, employing again the STS Multiplex ICP dry etcher.
The device characterization was carried out through electrical tests in three different configurations, all of them performed in air at room temperature. DC sweeping mode was first adopted to evaluate the forming voltage and to inspect the cycling operation. To this aim, a parameter analyzer (Agilent B1500) was employed, applying voltage ramps at the tungsten electrode and keeping grounded the platinum one. During these measurements, a compliance current,
All the different stacks employed for the tested devices are summarized in
Material stacks of all the tested devices.
noBuffer | Pt | 125 | HfO2 | 5 | – | – | W | 60 |
mixBuffer | Pt | 125 | HfO2 | 5 | W:Ti 10% | 3 | W | 60 |
Buffer1 | Pt | 125 | HfO2 | 5 | Ti | 1 | W | 60 |
Buffer3 | Pt | 125 | HfO2 | 5 | Ti | 3 | W | 60 |
Buffer5 | Pt | 125 | HfO2 | 5 | Ti | 5 | W | 60 |
The cross-point geometry of the tested devices is shown through a 3D sketch
In order to carry out a complete performance analysis suited to compare the material stacks and investigate the effect of the Ti-based buffer layers, 25 devices for each sample were first subjected to a systematic DC characterization made of forming and cycling steps. Pristine devices underwent positive voltage sweeps from 0 to 7 V with a compliance current of 1 mA; then, bipolar voltage ramps ranging from −1.5 V to 3 V were applied to the same devices to test the cycling behavior. Bipolar resistive switching, with SET and RESET occurring in positive and negative polarity, respectively, was observed for all the devices regardless of the material stack. The latter, conversely, turned out to play a role in the definition of the device performance. First of all, an impact of the titanium-based buffer layers on the forming process was observed, with a decrease of the forming voltage (
The median values of
Consistent results were shown by the C-AFM characterization too. As reported in
Investigation of the forming process was performed with conductive atomic force microscopy (C-AFM) directly probing the oxide layer by means of full-platinum tips. The resulting
Even though the C-AFM analysis clearly reported the presence, in all the tested material stacks, of conductive spots at the HfO2/Pt interface, suggesting resistive switching of filamentary type, a statistical DC characterization was performed to exclude a dependence of the RS on the device area as a consequence of interfacial effects at the W/HfO2 or buffer layer/HfO2 interface. By means of the parameter analyzer, bipolar voltage sweeps in the range −1.5 to 3 V were applied on 25 devices for the NoBuffer, mixBuffer, and Buffer5 samples. As summarized by the box plots in
The resistance levels
Through the same DC characterization, that is to say applying consecutive cycles of bipolar voltage sweeps 0 V → −1.5 V → 3 V → 0 V, the switching behavior of the devices was investigated. As is reported in
Applying bipolar voltage sweeps, the switching behavior of the tested device was investigated through the resulting
The statistical analysis of the DC characterization performed on 25 devices for each material stack is presented by means of
The second major result arising from the insertion of a Ti-based buffer layer, which becomes apparent for Buffer3 and Buffer5 samples as for the HRS stability above-mentioned, involves the opposite polarity and the opposite transition. In
The statistical parameters resulting from the DC characterization performed on a total of 125 devices are summarized in
Median values and standard deviations from the statistical DC characterization.
noBuffer | 3.31 | 0.09 | 1.76 | 0.38 | −0.64 | 0.12 | 94.48 | 154.61 | 272.55 | 171.05 |
mixBuffer | 3.07 | 0.08 | 2.05 | 0.34 | −0.68 | 0.10 | 192.86 | 3711.84 | 84.86 | 84.86 |
Buffer1 | 2.89 | 0.15 | 1.72 | 0.32 | −0.63 | 0.09 | 226.78 | 427.42 | 214.86 | 169.08 |
Buffer3 | 2.58 | 0.09 | 0.64 | 0.10 | −0.43 | 0.04 | 309.41 | 499.79 | 483.00 | 77.28 |
Buffer5 | 2.49 | 0.12 | 0.65 | 0.10 | −0.43 | 0.03 | 368.39 | 1011.09 | 474.82 | 69.09 |
Based on reaction (1), both the current fluctuations before SET occurs and the gradual RESET can be interpreted referring to oxygen exchanges, which, in turn, involve the oxidizing activity of the layers in contact with the hafnium dioxide. Since, as already mentioned, one of these layers is always made of platinum, which is inert, the two phenomena must be related to the buffer layer, or to the tungsten electrode when the former is not present. In this view, the interpretation of the observed behavior in the DC regime can be traced back to the different oxidizing characteristics of titanium and tungsten. Current fluctuations may be related to the multiple, metastable oxides tungsten can form before reaching the stable WO3 (Lassner and Schubert,
A further confirmation of the stabilizing effect given by the titanium buffer layer was then found with pulse tests aimed at investigating the endurance of the devices, namely their cycling reliability. For each material stack, an initial optimization procedure was first performed on the pulse parameters in order to find the best combinations of pulse width and pulse amplitude. As is shown in
The insertion of buffer layers with increasing amount of titanium translates into a faster response of the devices, as shown by the pulse width reduction achieved with thicker Ti-based buffer layers.
Once the pulse parameter optimization was completed, a common test procedure was defined and adopted for all the material stacks, so that a clear performance comparison among the different samples was possible. Specifically, all the devices subjected to the endurance test were subjected to 2,000 SET–RESET pulse pairs aimed at continuously switching between HRS and LRS. The results of this characterization, reported in
Endurance tests were performed with a fixed sequence of 2,000 SET–RESET pulse pairs. The NoBuffer
Summary of resistance values during endurance and retention measurements.
noBuffer | 4.73 | 119 | 1.27 | 1.4 | 13.22 | 30 | 1.47 | 4.8 |
mixBuffer | 3.10 | 156 | 1.27 | 18 | 1.26 | 2.0 | 1.00 | 2.3 |
Buffer1 | 1.61 | 180 | 1.44 | 16 | 0.93 | 2.9 | 1.35 | 2.3 |
Buffer3 | 10.11 | 87 | 3.81 | 36 | 32.26 | 3.3 | 2.52 | 3.9 |
Buffer5 | 8.52 | 41 | 1.38 | 2.3 | 17.02 | 5.1 | 1.27 | 6.3 |
To complete the set of electrical characterizations, retention tests were performed on new samples to compare the capability of the different material stacks of preserving each resistance state. A summary of the mean values, together with their relative uncertainties, for both HRS and LRS during pulse operations is presented in
With this work, we have shown how titanium can be employed, as a buffer layer, to stabilize and tune the RS performances of ReRAM cells based on CMOS-compatible materials like HfO2 and tungsten. With an extensive, systematic approach, 125 devices with different material stacks have been tested. Investigating different thicknesses and compositions of the Ti-based films, a dependence of the device performances on the buffer layer properties was found, and the amount of titanium in the buffer layer turned out to play a key role. The presented results can be ascribed to the different oxidizing characteristics of titanium and tungsten. The latter, indeed, suffers from a relatively slower oxidation process, producing a variety of metastable oxides, responsible for the RS instability which clearly appears in both DC switching and pulse operations. Employing buffer layers with a high enough amount of titanium, relevant changes in the device performances have been reported. More in detail, the response speed has been shown to significantly increase according to the pulse width reduction of three orders of magnitude; an improvement of about 30% has been achieved in terms of endurance performance, and an increased stability of the resistance states, especially the HRS, has been obtained in the dynamic operation regime. In light of these results, the Ti buffer/W stack turns out to be a suitable choice for CMOS-compatible ReRAM cells that have to solve reliability issues coming from tungsten electrodes. Furthermore, the possibility of tuning the device performances according to the Ti-based buffer layer properties may open the way to the definition of new design rules for ReRAM integration with standard CMOS technology.
The raw data supporting the conclusions of this article will be made available by the authors, without undue reservation.
VF and ES contributed to the design and fabrication of the devices. VF performed device characterization. VF and CR wrote and revised the manuscript. CR and YL helped with supervision. All authors contributed to the article and approved the submitted version.
The authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.
The help and the technical support given by the staff of the Center of Micro-nano Technology (CMi) of EPFL are gratefully acknowledged. A hearthfelt thank goes to P. Charpilloz for his supervision during AFM measurements.