Investigating charge trapping in ferroelectric thin films through transient measurements

A measurement technique is presented to quantify the polarization loss in ferroelectric thin films as a function of delay time during the first 100s after switching. This technique can be used to investigate charge trapping in ferroelectric thin films by analyzing the magnitude and rate of polarization loss. Exemplary measurements have been performed on Hf0.5Zr0.5O2 (HZO) and HZO/Al2O3 films, as a function of pulse width and temperature. It is found that the competing effects of the depolarization field, internal bias field and charge trapping lead to a characteristic Gaussian dependence of the rate of polarization loss on the delay time. From this, a charge trapping and screening model could be identified which describes the dynamics of polarization loss on short timescales.

the polarization state, leading to polarization loss [20]. Even in the common case when ferroelectric HfO 2 is sandwiched between two TiN electrodes with no intentionally grown dielectric layers, TiO x and TiON can form at the ferroelectric-metal interfaces which will impact the depolarization field and interface trap states [13]. In the presence of a DE layer, a significant leakage current [34] and high density of interface traps [8] need to be considered to fully compensate charges arising from polarization switching. The degree to which polarization charges are compensated can be controlled via the switching pulse parameters, and thereby the charge injected during switching [31].
The impact of charge trapping on device operation has been quite heavily researched for FeFETs, where an interlayer improves the memory window for a ferroelectric integrated on a semiconductor channel [28].
In this case, trapped charges most notably cause threshold voltage instabilities [41] which increases read latency, i.e. the time after writing at which the device can first be reliably read [30]. Finally, trapping and detrapping has been suggested as a driving force for gradual or accumulative switching in ferroelectric films, where domains are switched by the application of multiple consecutive pulses [18,29].
In this paper we will investigate charge trapping in single-layer Hf 0.5 Zr 0.5 O 2 (HZO) and bilayer HZO/Al 2 O 3 films with TiN electrodes. We present a novel measurement technique making use of a modified positive-up, negative-down (PUND) pulse train to quantify the polarization loss that occurs on short time scales (<30 s) after switching the FE. This is a complementary method to standard retention measurements, which measure the polarization state after long time periods [27]. On the contrary, this method allows the quantification and analysis of fast polarization loss in ferroelectric films. This fast polarization loss is a consequence of competing internal fields and charge trapping effects in the time frame during which the film reaches a state of quasi-equilibrium. We will discuss how various parameters in the measurement such as temperature and pulse width can be modified in order to investigate the dynamics of polarization stabilization and loss, by presenting results performed on three film stacks with different top interfacial layers. A strongly varying rate of polarization loss is observed in the first 100 ms after switching, which is a critical time period for ferroelectric device operation. Finally, further applications of the presented method are discussed.

Device fabrication
In order to fabricate capacitor devices, blanket bottom electrodes (BEs) of TiN were first deposited via sputtering under ultra-high vacuum. Then, 11 nm thick Hf 0.5 Zr 0.5 O 2 (HZO) films were deposited via atomic layer deposition (ALD) by alternating cycles of HfO 2 and ZrO 2 with HyALD (HfCp(NMe 2 ) 3 ) and ZyALD (ZrCp(NMe 2 ) 3 ) as metal-organic precursors and ozone as an oxidant. Al 2 O 3 layers of different thicknesses (1.5 or 2 nm) were deposited with ALD using TMA as a precursor and ozone as an oxidant. Top electrodes (TEs) of TiN were deposited in the same way as the BEs and the sample was then annealed at 500°C for 20s to promote crystallization of the HZO films. Finally, capacitor structures with a diameter of 200 µm were formed by evaporating top contacts of Ti/Pt (10/25 nm) through a shadow mask, which acted as hard masks for a subsequent SC1 etching of the top TiN electrodes.

Pulse train for quantifying backswitched polarization
To investigate polarization loss (P loss ) as a function of different pulse parameters, the pulse train shown in figure 1 was applied to the devices described above. Before the measurement sequence, a prepolarization pulse consisting of a triangular positive and negative pulse is applied to minimize any impact of imprint effects on the measurement results. The measurement sequence is a modified version of a PUND (Positive-Up, Negative-Down, figure 1a) pulse sequence used to isolate the switching current in ferroelectric films [10]. Two sets of pulses are applied in each polarity, separated by a time delay t del at 0 V, where the first pulse pair determines the switching current, and the second again switches any polarization which was lost during t del .
In this case, double pulses are applied for each switching or backswitching measurement, where the first pulse contains all current contributions from switching, leakage, and dielectric displacement (P/N pulses), while the second is performed immediately after the first pulse, so that only leakage and dielectric displacement currents contribute (U/D pulses). The current difference between these pulses can therefore be integrated over time to find the switched charge. The different pulses in each polarity are denoted with S for the switching pulses and BS for the backswitching pulses. When changing polarity and in between the pre-pole pulses, a time delay of 500 ns with an applied voltage of 0 V is used to minimize the influence on the subsequent pulse.
An example of the current traces measured for all time delays for a single set of pulse parameters (pulse width and amplitude), at a fixed temperature, is shown in figure 1b. Due to measurement constraints, the switching charge is always integrated only on the rising edge of the pulse. In preliminary investigations, it was found that the current measured on the falling edge is always identical in the switching and non-switching pulses. As such, this contribution always cancels completely in the calculation of the switched charge. This is shown with exemplary measurements in the supplementary materials (figure S1). P loss can then be quantified via the following equation: and may be normalized to the total switched charge by: In the negative polarity, the P and U pulses are replaced with N and D pulses.
The inset in 1b shows the current of P BS on an enlarged scale. It is clear that with an increasing t del , the coercive voltage V c of the P BS shifts to higher voltages, an effect known as imprint. The physical meaning of this shift is that as t del increases, it becomes energetically more difficult to switch all domains back into the same state. This phenomenon has been described as a signature of charge trapping into the interfacial layers during the delay time [38]. The imprint effect provides valuable information on the redistribution of charges during the delay time and could further be investigated for its time-dependence [5,39]. In this paper however, we focus primarily on quantifying the polarization loss as an integral of the switching current. Likewise, a positive bias can inject holes at the BE, while a negative bias can inject holes at the TE, although electron injection is expected to be a stronger effect [2]. In order to investigate the impact of charge trapping, various pulse parameters are modified. Modulation of the internal electric field by charge injection is achieved by changing the pulse width t pls as depicted in figure 2b, which is kept the same for all pulses on the pulse train. The pulse widths applied in our experiment were 25, 50, 100 and 250 µs. The peak voltage V pls is fixed so that the field over the FE layer (assuming a capacitive voltage divider model and neglecting the influence of any unintentional interlayers, discussed below) is ∼ 3.5 V. One caveat is that the range of t pls possible to apply for a given V pls is somewhat limited, since full switching on all pulses is required so as not to distort the analysis.

Measurement parameter space
Here it should be noted that besides the intentional dielectric layer at the top electrode, previous experiments have demonstrated that due to the deposition process, a TiO 2 /TiON layer is formed at the bottom electrode interface [3]. Without an Al 2 O 3 layer at the top of the HZO film, TiON also forms at the TE interface with HZO, which may further grow during high temperature annealing [13]. While these have a smaller influence on the depolarization field and field drop over the ferroelectric, they cannot be neglected and impact the switching of the HZO film due to the poor uniformity and chemical heterogeneity of these interfaces [13,3], which have a significant impact on the ferroelectric behavior of MFM HZO capacitors with TiN electrodes.
The simplified band diagrams for the HZO/Al 2 O 3 bilayers under no external applied bias are shown schematically in figures 2c & 2d for P up and P down , respectively. The field inside the ferroelectric is made up of several components, as shown on the diagram. Opposing the polarization there is always a depolarization field E dep , whose magnitude depends on the thickness of the non-switching DE layer, the relative dielectric constants of the DE and FE, and the magnitude of the polarization, P [19]. In addition, an internal bias field E int exists due to work function differences in the electrodes [32] and/or to fixed charges in the ferroelectric, namely oxygen vacancies formed at the TE during annealing [7]. In all of our stacks, E int points from the top to the bottom electrode, i.e. it points in the same direction as the depolarization field when the device is in the P up state.
Countering this and thus stabilizing the ferroelectric polarization by providing an enhanced screening charge, trapped charges in the dielectric layer produce an opposing field E trap [9,2]. Besides carrier injection during switching, it is expected that additional electrons and holes can be trapped during the delay time t del , driven by the depolarization field and/or the internal field (as indicated in the diagrams). Thus during t del the system should tend towards an equilibrium, with polarization loss occurring and charge trapping continuing until reaching a point where all the internal fields are sufficiently weak to cause unobservable changes at the device terminals. The rate of polarization loss would then depend on the interplay of the static internal bias field, the depolarization field, and the screening field caused by injected carriers.
Since E dep is dependent on the properties of the dielectric layer, and furthermore the thicknesses of the unintentional layers cannot be determined with high accuracy, we will investigate three films with varying DE layers. These are a nominally DE-free ('HZO only') film, a film with 1.5 nm Al 2 O 3 and a film with 2 nm Al 2 O 3 . Finally, pulse measurements were performed at temperatures from 100-300 K. Assuming that the tunneling mechanism and thus the charge injection in the Al 2 O 3 layers is temperature-dependent [15], modifying the sample temperature gives control over the trap occupation, thereby also modifying E trap . The lower measurement range is increased by using 4225 Remote Preamplifier/switch Modules (RPMs).

Measurement setup
Temperature dependent measurements were conducted on a Lake Shore Cryogenic CPX-VF probe station, and liquid nitrogen was used as a coolant. This could be used to cool the system down to 80 K, but we limited our lower temperature to 100 K to ensure stable temperature operation. Kapton tape was placed between the sample and stage to maintain electrical isolation from the grounded cryo stage. Pulses were applied from the same PMUs as used in the room temperature measurements.

Polarization loss as a function of delay time
First, devices were woken-up at room temperature by applying 1000 electric field cycles at a frequency of 100 kHz. Then, the polarization loss was measured as a function of the delay time at 0 V bias. Figure 3 shows this relationship for devices of each oxide thickness, for pulse widths of 100 µs, in the P up and P down states.
One significant trend shows that the polarization loss at a given time delay, for P up (positive voltages), increases as the thickness of the dielectric increases. The polarization loss difference between films becomes even stronger with increasing delay time until saturating after roughly 100 ms. The greater polarization loss can be attributed to the increased depolarization field stemming from a thicker non-switching layer, combined with less effective charge injection at the top HZO interface due to the thick DE layer. After time, the polarization loss in a given polarity is seen to saturate. The longest time delay used in our experiments was 30 s; thus, this saturation implies that on the time scales investigated here, we see a saturating short-term retention loss effect, which is further analyzed in the next section.
Finally, there is a clear asymmetry in the magnitude of P loss measured in each polarity. This asymmetry is larger for thicker Al 2 O 3 layers due to the increasing depolarization field, which requires a larger amount of trapped charge to produce a compensating field E trap . At the same time, charge injection is hindered with a thicker Al 2 O 3 layer. The asymmetry of the polarization loss highlights the role of E int in destabilizing the polarization predominantly in one direction. The aggregation of positively charged oxygen vacancies at the top Al 2 O 3 interface is consistent with a quasi-static internal bias field that points down. As shown schematically in figure 3c, the internal bias field is assumed to come from one or more effects. An intrinsic effect to the bilayer material system is the difference in areal oxygen density in Al 2 O 3 and HZO, which should lead to a surface dipole. Negatively charged oxygen ions at the interface will preferentially move to the material with a lower areal oxygen density, in our case HZO, forming an internal field pointing in the opposite direction compared to the dipole. As in the case of HZO only films, oxygen vacancies may be generated near the top of the material stack [17]. Finally, the physical separation interposed by a thicker dielectric layer at one electrode interface and a more ideal metal/ferroelectric opposing interface may cause the ferroelectric domains to polarize in the direction of the high concentration of free electrons at the more ideal metal electrode interface [21]. Besides directly acting against the polarization in the P up state, E int can also inhibit charge injection which would stabilize the state. Conversely, charge migration is facilitated in the direction of the internal field (figure 3d), leading to a lower polarization loss in the P down state. This effect has direct implications for device operation and can be observed for example in the retention characteristics of bilayer FTJs, where retention loss acts preferentially on one state [24]. This will be discussed in more detail in section 3.3.

Polarization loss as a function of pulse width
The quantity of the injected charge carriers that screen the depolarization field should be modulated by the pulse width of the applied bias. Since the injected charge carriers are predicted to reduce the depolarization field, it is expected that a resulting decrease in the polarization loss with increasing pulse width would adhere to the charge injection screening model. Moreover, since longer pulse widths inject more screening charges,   Finally, devices were investigated as a function of temperature. Both cycled (woken-up) and uncycled devices were measured at 50 K intervals from 100-300 K. Wake-up was always performed at room temperature, as it is known to have a strong temperature dependence due to the energy barrier for the redistribution of charge traps [35], which would therefore influence our polarization loss measurements. As above, wake-up was performed for 1000 cycles at 100 kHz. To compare between measurements, P loss was always extracted after a delay time of 1 s. There is both an Al 2 O 3 thickness dependence and a temperature dependence on the total switchable charge 2Pr; as such, the data plotted here are normalized following equation 2.

Polarization loss as a function of temperature
Figures 5a & 5b demonstrate a strong asymmetry in the temperature-dependent behaviour of P loss when Al 2 O 3 is introduced into the device stack. Contrary to the room-temperature dependent data shown in 1, we also see a slight asymmetry (around 5%) in the behaviour of the nominally HZO only film. As shown in that figure, the polarization loss is larger for positive voltages (P up , electrons injected at the TE) than negative voltages (P down , electrons injected at the BE). Further, a strong dependence on Al 2 O 3 thickness is observed in for P up while P down shows no such thickness dependence on polarization loss. This offers further evidence that the dominating factor in P loss is the interplay between electron injection and the internal bias field. Assuming that electrons are the primary charge carrier being injected into the interface states, P loss in the negative polarity would be mainly determined by the properties of the interfacial layer (IL) at the bottom electrode, which is nominally identical for all three films.
From this we can conclude that all three films have asymmetrical ILs, although the asymmetry is relatively small in the case of the nominally HZO-only film compared to the FE/DE bilayers. To further understand this, we can consider the process flow of the stacks. Firstly, a vacuum break occurs between the TiN and HZO depositions. Additionally, the bottom TiN is oxidized during the first few ALD cycles. This forms a barrier for oxygen scavenging which occurs during the crystallization anneal [37]. On the other hand, the top HZO/TiN or HZO/Al 2 O 3 interface is more reactive during the anneal [7]. As such, a large amount of oxygen vacancies are expected to form near the TE, which dominate the switching properties of the film prior to electric field cycling. In fact, the formation of a tetragonal IL near the top electrode has been observed [12] and attributed to this oxygen scavenging effect [11,26].
In figures 5c & 5d, the same experiments were repeated on woken-up films. Strikingly, there is no change in the P loss observed for positive voltages, while the temperature dependence of the polarization loss for negative voltages is reduced. In fact, as is shown in supplementary figure S2, the temperature dependence for negative voltages changes sign, with a lower P loss at lower temperatures.
Comparing the data before and after wake-up cycling, we can conclude that the depolarization field originating from the TE IL remains unchanged with wake-up cycling. At the same time, the temperature dependence of P loss for negative voltages indicates that the polarization state can be better stabilized after wake-up. As discussed above, the internal bias field E int plays a large role in both destabilizing the P up state and also in suppressing charge injection during the delay time. As the temperature is decreased, fewer charges are available to act against the internal field. This strengthens the internal field and thereby increasingly favours P down over P up . Thus, the electrical properties of the films are dominated by the asymmetry in charge trapping at the two interfaces, as has been previously demonstrated for MIM [40], MFS [42] and MFM capacitors [33] and remains one of the major reliability issues for ferroelectric thin films.

Consequences for ferroelectric memory devices
The results demonstrated here have an impact on the design and operation of ferroelectric-based memory cells, such as FeFET and FTJ. On the design side, the results indicate that there is a trade-off in device speed and compensation of the polarization charges. As previously shown in literature [9], having a larger density of interface traps helps to stabilize a higher 2Pr value in the case of a thicker interfacial oxide (for example, in bilayer FTJ devices). Our results indicate that this leads to a certain 'settling time' during which a charging current can be observed, on a time scale which does not vary greatly with the applied pulse parameters (figure 4d). While exploring a larger parameter space may yet yield a similar difference in the rate of polarization loss as seen for HZO films (figure 4b), it is also plausible that the slow charge trapping is an inevitable result of the intrinsic contributions of the internal bias field and the depolarization field. Of these two, the internal bias field in particular could be further researched in order to better stabilize the binary switching behavior. This may be achieved through interfacial engineering and modifying the oxygen gradient in the film stack, in particular. The highly asymmetric behavior demonstrated in figures 3, 4c,d & 5 further strengthens the hypothesis that these short time dynamics are strongly impacted by a unidirectional internal bias field.
The polarization loss shown in figures 4b,d can be translated into a current, which needs to be accounted for in the design of the readout circuitry especially in the case of FTJ devices that typically feature a comparatively low read current. Accordingly, the minimum read latency of such memory devices is limited to the time after the peak of the polarization loss. In the case of FeFET, the characterization described here may also aid in both design optimization and determining suitable write operation parameters in order to reduce read latency, with potential trade-offs in short-term retention.

Conclusions & Outlook
We have demonstrated a novel characterization method for analyzing the backswitched charge in ferroelectric stacks on small time scales. This is a complementary method to standard retention measurements which are used to investigate device reliability in ferroelectric HZO or bilayer stacks [27,24], in that it is used to investigate the fast dynamics of the system after switching. The measurement gives important insights into how polarization is stabilized in ferroelectric films, particularly when integrated with an intentional dielectric layer. A rapid polarization loss is seen in the first 100 ms after switching, which is a critical time frame for applications of bilayer FTJs [6] or FeFETs [30]. Indeed, the current arising from backswitching which can be extracted from the rate of polarization loss in figure 4 is critical when compared to the read current of an FTJ device.
By analyzing the polarization loss as a function of delay time, pulse width and temperature, we propose a charge trapping and screening model to explain the fast time dynamics of ferroelectric layers. To a lesser extent, this effect is also present in single-layer HZO films. Charge trapping, driven by the depolarization and internal bias fields, occurs in the first tens of ms after switching and helps to stabilize switched polarization by screening the polarization charges. Simultaneously, the depolarization field leads to back-switching of some domains. These competing effects are evident in a peak in the rate of polarization loss which for HZO films is highly dependent on the parameters of the applied pulses. For samples with a dielectric interlayer, the rate of polarization loss is less dependent on the pulse parameters for the range of pulse widths explored here, as the dynamics are mainly controlled by the larger internal bias field and longer pulses may be needed to inject a greater quantity of screening charge across the Al 2 O 3 layer.
Beyond the scope of the analysis here, the data produced by this measurement could be applied to analyze imprint effects or to better identify the time dynamics of charge injection in HZO and HZO/DE bilayers.
The investigation of the dynamics of fast polarization loss in ferroelectric films offers additional material properties which should be carefully designed for, in order to achieve high-performing ferroelectric devices.  In preliminary experiments, a modified pulse train was applied as in figure 1a. Figure 1b depicts the P S and P BS pulses where the current has been measured on both the rising and falling edges of the pulses. The pulse in red is the 'background' pulse (BG), measured 20 ns after P S , which was subtracted from both P S and P BS . For I < 0 mA (corresponding to the falling pulse edge), we see that all three pulses perfectly overlap.
Therefore, they are cancelled in the integrals of equations 1 and 2. Since the total number of measurement 1 arXiv:2206.14593v1 [cond-mat.mtrl-sci] 29 Jun 2022 points for the whole measurement (a single measurement is one set of pulse parameters, measured at all time delays t del ) is limited by the setup, we used the above conclusion to measure on the rising edges only.
This allowed us to maximise the number of time delays we could investigate without introducing additional unwanted delays into the measurement.
2 Temperature dependence of polarization loss in negative polarity After wakeup cycling, the temperature dependence of P loss is greatly reduced, even tending towards the inverse behaviour. With wakeup cycling, we expect a redistribution in charged vacancies incorporated into the stack during processing. Nonetheless, the internal field arising from the asymmetry of the electrodes persists.
Thus at lower temperatures, where there are fewer mobile charges to screen this internal field, we observe a strong favoring of one polarization state over the other. Nonetheless, the dependence of P loss on pulse width (compare figures 2(d-e)) still indicates that we have an influence of charge trapping on the polarization state.