Processing and Interconnections of Finely Segmented Semiconductor Pixel Detectors for Applications in Particle Physics and Photon Detection

Radiation hardness is in the focus of the development of particle tracking and photon imaging detector installations. Semiconductor detectors, widely used in particle physics experiments, have turned into capacitive-coupled (AC-coupled) detectors from the originally developed conductively coupled (DC-coupled) detectors. This is due to the superior isolation of radiation-induced leakage current in AC-coupled detectors. However, some modern detector systems, such as the tracking detectors in the CERN LHC CMS or ATLAS experiments, are still DC-coupled. This originates from the difficulty of implementing AC coupling on very small pixel detector areas. In this report, we describe our advances in the detector processing technology. The first topic is the applications of the atomic layer deposition processing technology, which enables the very high densities of capacitance and resistance that are needed when the dimensions of the physical segmentation of pixel detectors need to be scaled down. The second topic is the flip-chip/bump-bonding interconnection technology, which is necessary in order to manufacture pixel detector modules on a large scale with a more than 99% yield of noise-free and faultless pixels and detector channels.


INTRODUCTION
The silicon pixel detectors to be used for particle tracking in future high-luminosity colliders will receive very high irradiation doses. In the inner tracker of the Phase-2 CMS experiment, the expected maximum fluence is as high as 2.3 × 10 16 1MeVn eq /cm 2 . In the inner tracker, two pixel sizes are currently considered by CMS: 25 × 100 μm 2 and 50 × 50 μm 2 [1].
After such a high dose, the charge carrier mean free path, that is, the drift saturation velocity multiplied by the trapping time, will be of the order of 20-40 µm [2]. However, the pixel segmentation in the devices that are currently used is much larger, typically 100 μm × 100 µm [3]. One approach to maintain adequate charge collection efficiency in planar detectors is to reduce the detector thickness and to increase the detector bias voltage. On the other hand, improving the granularity of the segmented detectors, that is, to downscale the pixel size of the detectors, is important for keeping the detector occupancy low and, thus, the detector position resolution high (occupancy is the number of particles traversing a pixel per event).
The motivation to switch from DC-coupling to AC-coupling arises from the elevated leakage current induced by the accumulated radiation damage caused by incident radiation. The detector leakage current (I leak ) is prevented from being fed to the CMOS read-out ASIC chip (ROC) by the integrated capacitance. The elevated I leak also has a detrimental effect on the stability of the ROCs that are used in practical radiation detection environments and applications. Some modern and currently operational detector systems are still DC-coupled. The explanation for this is the difficulty of successfully implementing AC-coupling on relatively small pixel areas of the order of 120 × 100 μm 2 . However, in pixel detectors, it is the patterned top side that is connected to read-out. Thus, the small coupling capacitance on the top of the DC-coupled pixels compared to larger backplane capacitance, or larger capacitance between the neighboring pixels, would result in the collection of charge from wrong contact and, thus, in the failure of detector operation. Namely, the signal is always collected from the area of higher capacitance.
Furthermore, pixel devices could have an n + -implanted surface on the surface of p-type silicon bulk material (i.e., p-type detectors, or n + /p − /p + devices). Unlike n-type silicon material, p-type silicon material does not undergo space charge sign inversion (SCSI) when exposed to ionizing radiation. Thus, in silicon detectors, the maximum of the electric field collecting the charge carriers beneficially stays on the segmented side of the device even after exposure to high doses of irradiation. Electrons have a higher drift velocity than holes and, thus, are collected into n + contacts on p-type silicon more efficiently than holes in the traditional detectors that have p + contacts on n-type silicon [4,5]. However, among the scientific community, two widely discussed challenges of n + /p − /p + silicon detectors are, first, the challenges associated with the manufacturing technology and, second, how to compensate the electron accumulation near the interface between the p-bulk silicon and the insulating silicon dioxide (SiO 2 ) layer that characteristically has positive oxide charge. This electron accumulation is unfortunate in p-type silicon detectors because it generates a short-circuiting channel between the n + pixels [6].
In order to avoid detrimental short-circuits caused by nearsurface electron accumulation in p-type detectors, traditional ways include p-spray and p-stops [5]. We used the method of applying a thin-film insulator with a negative oxide charge on the top of the n + segmentations. We have successfully prepared thin aluminum oxide (Al 2 O 3 ) layers that naturally have a negative oxide charge by using the method of atomic layer deposition (ALD) [7][8][9].
Metal-nitride thin films can be deposited, too, using the ALD method. ALD-grown metal-nitride thin films also have the features required by high-quality insulating layers, namely, high precision, high uniformity, and high density of resistance [10]. Silicon pixel detectors are often resistively biased because the electrical current-voltage (IV) quality assurance of the devices is detrimental if performed before the assembly of the detector module by flip-chip (FC) bonding. These bias resistors are commonly manufactured, for example, by using doped polysilicon or applying punch-through structures [3]. However, when applying these traditional technologies to the small dimensions of pixel segmentation, it is difficult to maintain the bias resistance in the required range of megaohms.
In this report, we present two excellent applications of the ALD technology for solving the challenges in the manufacture of highly segmented pixel detectors with very small dimensions. The first application uses an ALD-grown Al 2 O 3 thin-film field insulator with a natural negative oxide charge in the manufacture of p-type silicon detectors. The second application uses ALD-grown titanium nitride (TiN) thin-film bias resistors in highly segmented pixel detectors.

MAGNETIC CZOCHRALSKI SILICON AS SUBSTRATE MATERIAL
Traditionally, silicon radiation detectors have been manufactured using n-type high-resistivity low-impurity float zone (Fz-Si) wafers as the starting material [11,12]. Consequently, these high-purity Fz-Si wafers also have a very low concentration of oxygen. However, as early as in the 1990s, the CERN RD48 collaboration demonstrated that the diffusion of oxygen into silicon material improved the tolerance of silicon detectors against radiation-induced defects. The RD48 collaboration found that the beneficial concentration of oxygen in silicon detector material is about 1 × 10 17 cm −3 , which is much higher than that in pure Fz-Si [13,14].
On the other hand, Czochralski silicon (Cz-Si) has a naturally high and well-controlled concentration of oxygen. Because of the demand for them in micro-and nanoelectronics, sufficiently high-resistivity, that is, 1-10 kΩcm, Cz-Si wafers have been available for the manufacture of radiation detectors since the millennium [15,16]. Furthermore, in the magnetic Czochralski (MCz) method [17], the silicon ingot is grown in a strong magnetic field so that the concentration and distribution of oxygen and the p-or n-type dopants can be controlled better than in the case of the conventional Cz or Fz crystal growth technologies [18].

Design and Processing of P-Type MCz-Si Pixel Detectors
Our recent pixel detector design consists of two types of sensors suitable for FC bonding with different read-out ASICs: a PSI46dig-geometry AC-coupled pixel sensor with a 200 μm × 100 μm bump pitch and an RD53 A-geometry DC-coupled pixel sensor with a bump 50 μm × 50 μm pitch; see Figure 1. Both the PSI46dig and RD53 A are readout chips (ROCs) currently being used in the CERN CMS experiment [3].
The blue color in Figure 1 indicates sputtered titanium nitride (TiN) thin-film metal bias resistors that allow AC-coupling ( Figure 1A) and in the case of DC-signal coupling ( Figure 1B) enable current-voltage (IV) measurement before the detectors are connected to readout chips by the FC interconnection method. These detector designs have been published in many conference presentations, and pictures of the entire completed detector wafers in online compilations Frontiers in Physics | www.frontiersin.org February 2021 | Volume 9 | Article 601730 can be found, for example, in Refs. [20][21][22]. The detailed detector design, including TCAD simulations and electric field distribution calculations, is published in Ref. [23]. The detector manufacturing process is very similar for both the high-resistivity Cz-Si material and the traditionally used Fz-Si material. The oxygen concentration is the only essential difference between these materials, requiring modified recipes during the back-end process. The detectors described in this report were processed in 2013-2020 at Micronova, the Finnish national research infrastructure for micro-and nanotechnology, jointly run by the VTT Technical Research Centre and Aalto University [24]. Single-side-polished MCz-Si wafers, 150 mm in diameter, 320 µm thick, and with a <100> orientation, provided by Okmetic Oy were used as the starting material [25]. The nominal resistivity of the boron-doped p-type wafers was 6-8 kΩcm. The interstitial oxygen concentration in the particular Si crystal we used was determined by the manufacturer's production in-line Fourier Transform Infrared Spectroscopy (FTIR) quality assurance (QA) measurement to be 7.5 ppma according to the ASTM F121-83 specifications. 7.5 ppma corresponds to an oxygen concentration of about 4 × 10 17 cm −3 [26].
Our detector fabrication process is rather conventional. It contains seven mask levels, including thermal oxidations, ion implantations, ALD depositions, and sputtered metal depositions. A detailed process description, as well as the FIGURE 1 | Two different pixel detector designs. The pixel design in (A) has a 200 μm × 100 µm pitch compatible with the PSI46 ROC series, which has a 52 × 80 dualcolumn readout architecture. The design in (B) has a 50 μm × 50 µm pitch compatible with the RD53 collaboration ROC that is under development at CERN [19]. device design for large-area p-type pixel detectors, is presented in Refs. [27][28][29]. A tentative process flow is shown in Figure 2. The starting material is >4 kOcm, p-type, 150 mm silicon wafer. The detector process includes two ALD-deposition steps, both n + and p + ion implantation steps, two oxidation steps, six lithography steps, seven etching steps, and sputtering and sintering steps. Furthermore, the detector module manufacture includes lithography, sputtering, lift-off, and dicing for making the under-bump metallization for the next step of interconnecting the detector to ROC by FC bonding. Finally, the FC bonded baredetector module is assembled and wire-bonded to printed circuit board (PCB). Between the high-temperature front-end processing steps, that is, in practice thermal oxidations and implanted boron/ phosphorus dose activations, the QA was carried out by means of photoconductivity decay (PCD) minority carrier recombination lifetime (τ e,h ) measurements. The contactless and automated PCD measurement allows the fast mapping of semiconductor wafers reliably monitoring the effective minority carrier recombination lifetime (τ eff ), which is the combination of the bulk lifetime (τ b ) and surface recombination limited lifetime (τ sr ) in different parts of the wafer.
PCD lifetime mappings have been performed on a regular basis during high-temperature detector processing steps, that is, in practice the thermal oxidations of silicon. The lifetime monitor samples are usually Si wafer quadrants as shown in Figure 3A. As an illustrative example, a PCD measurement indicating a localized contamination was selected, as indicated by a red arrow in Figure 3A. The contaminated area appears in the lifetime histogram in Figure 3B as a peak at the value of about 4500 µs.
When plotting the numerical histogram, about 2 mm edge exclusion was applied. This was solely due to practical restrictions in the PCD measurement technique. The PCD measurement reveals the minority carrier recombination lifetime in a contactless, non-biased Si wafer, that is, the reflection of the ∼11 GHz microwave signal, depends on the diffusing concentration of electrons/holes. When the quality of the Si is very good and the charge carrier lifetimes are of the order of 10 ms, the carrier diffusion length L of e − /h + (L sqrt (diffusion constant × carrier lifetime)) is of the order of the edge exclusion that is applied. Thus, with the PCD method, the regions near the diced edge do not provide meaningful data on the bulk purity of the Si material. However, the detector leakage current, that is, the generation current of e − /h + , has only an insignificant dependence on the silicon bulk properties if the carrier lifetime is more than about 1 ms [30].

P-Type MCz-Si and Thermal Donors
Oxygen thermal donors (TDs) are one of the most studied topics in material physics. It is well known from many studies that TDs are complexes that consist of at least four oxygen atoms and form when silicon wafers are exposed to the typical detector processing  temperatures of 400-600°C. Studies based on computational methods suggest that the formation of TDs and, thus, the formation of shallow donor levels in a silicon band gap are due to the migration of oxygen complex chains [31][32][33][34]. In general, when n-type MCz-Si detectors (i.e., p + segmentation on a phosphorus-donor doped n − bulk) are being processed, the formation of TDs is undesirable since it is equivalent to additional donor doping of the silicon material. Consequently, the additional doping increases the detector operating voltage V fd . Thus, temperatures above 400°C should be avoided after the last high-temperature processing step. On the other hand, when p-type detectors (i.e., n + segmentation on a boron-acceptor doped p − bulk) are being processed, it is possible to tailor the silicon doping by acceptor compensation. Spectroscopic studies of TD formation in detector-relevant high-resistivity silicon materials have been carried out previously and reported in Refs. [35,36]; see Figure 4.
The samples of the study presented in Figure 4 were diced pad detector diodes, processed on p-type MCz-Si wafers [16]. The nominal resistivity of the boron-doped wafers, as given by the vendor, was 1800 Ωcm, corresponding to an acceptor concentration (N boron ) of about 4.4 × 10 12 cm −3 . The effective doping concentration (N eff ) of the silicon was extracted after each consequent annealing step by capacitance-voltage (CV) probing from the values of the detector full depletion voltage (Vfd). Thus, the thermal donor concentration (N TD ) was estimated to be N TD |N boron -N eff | [37]. The samples in this study were processed on Okmetic 150 mm p-type magnetic Czochralski silicon (MCz) wafers. According to the manufacturers production in-line quality assurance (QA) data of LOT 421984-1 16.08.2017, the oxygen concentration in the silicon crystal was 7.5 ppma (ASTM F121-83 specifications, corresponding interstitial oxygen concentration 4.3 × 10 17 cm −3 ) and the resistivity 7 kΩcm. This corresponds to the doping of 1.9 × 10 12 boron atoms/cm 3 , further corresponding to the full depletion voltage Vfd of about 150 V. In the ready-made pixel detectors, the Vfd was about 60 V, corresponding to the resistivity of 16 kΩcm, further corresponding to the effective doping of 8.3 × 10 11 cm −3 . The difference of these two values of doping concentrations is the thermal donor concentration, in this case, 1.1 × 10 12 oxygen donors/cm 3 . This result is very much in accordance with our previous results [37]. However, it is worth noticing that the previous study was done using detectors with different kind of silicon wafer as a starting material and with very unlike oxygen concentration in the silicon crystal. In addition, as shown in Figure 4, previously we studied the silicon samples by annealing them in high temperatures, which is now omitted due to better understanding of thermal donor formation. Thus, in current detector processes, temperatures after oxidation steps are limited to 370°C.

PASSIVATION BY ATOMIC LAYER DEPOSITION THIN FILMS
An effective method for suppressing the undesirable electron accumulation in the interface between the p-type silicon bulk material and the insulating oxide near the detector surface is to apply a thin-film insulator which naturally has a negative oxide charge. This thin-film insulator must be deposited on the top of the silicon wafer after the high-temperature n + ion implantations and before the remaining lower-temperature (<400°C) processing steps.
The values of the negative oxide charge depend strongly on the parameters used during the ALD growth of the aluminum oxide Al 2 O 3 . In addition, the interpretation of the capacitance-voltage (CV) data measured from MOS-capacitors for the extraction of the values of the oxide charge requires some assumptions as well as comparison with CV data measured from pad detectors. However, we estimate that values of negative oxide charge in the pixel detectors of this study are as high as 10 12 electrons/cm 2 .
In addition to the negative oxide charge, this thin-film insulator must have a high-quality electrical interface between the oxide and the silicon, and it must be dielectrically strong in order to resist electrical breakdown. The negative oxide charge results in field-effect passivation, that is, repulsing electrons from the oxide-silicon Al 2 O 3 -Si interface by means of the Coulomb force. Field-effect passivation of this kind was applied for the first time in the photovoltaic solar cell scientific community [9].
It is worth noticing that ALD-grown aluminum oxide Al 2 O 3 is a field insulator that generates field-effect passivation on the top of the p-type detector. This field insulator is processed on p-MCz Si wafer just after the activation and drive-in diffusion of n + /p + implantations (see Figure 2). Thus, when manufacturing pixel detectors, the Al 2 O 3 layer gets sintered during the remaining high temperature steps, such as contact metallization, UBM, and FC bonding [27,37].
As shown in Figure 5, the narrow distribution and the value of the charge carrier lifetime of the as-grown aluminum oxide (Al 2 O 3 ), which is almost an order of magnitude lower compared to that of sintered Al 2 O 3 , indicate that the lifetime in the as-grown Al 2 O 3 was dominated by the surface FIGURE 5 | Histograms of charge carrier lifetime after ALD deposition of Al 2 O 3 oxide (as-grown, black) and after furnace heat treatment (sintered, blue). As a reference, a thermally dry oxidized SiO 2 passivated control sample (RED) providing information about the effective recombination lifetime in silicon bulk material [38].
Frontiers in Physics | www.frontiersin.org February 2021 | Volume 9 | Article 601730 5 recombination at the Si-Al 2 O 3 interface. In addition, the lifetime values are clearly higher in sintered Al 2 O 3 than in thermally oxidized silicon dioxide (SiO 2 ).

PIXEL DETECTOR INTERCONNECTIONS BY FLIP-CHIP BONDING
The configuration of the pixel detector requires the hybridization of the sensor and the readout chip (ROC) by means of the FC bonding technology (SET FC150 device [39]) see Figure 6 for details. The ROC has tin-lead (SnPb) solder bumps deposited by Advacam Oy [40]. In addition, the sensor pixel pad surface requires a solder-wetting metal known as under-bump metallization (UBM). We prepared a two-layer UBM formed by physical vapor deposition (PVD) MRC [41] magnetron sputtering system [42]. The first layer was a 20 nm thick titanium tungsten (TiW) adhesion layer on which 100 nm thick gold (Au) was deposited. This time, the silicon wafer was diced before the UBM, and the step-pixel patterning of UBM was then performed using a metal lift-off technology. During the FC step, the PSI46dig ROC and sensor were pre-aligned by the optics provided on the FC150 (SET) tool [43]. According to the tool manufacture specification, the post-bonding accuracy is 3 μm. In this detector configuration, thermocompression bonding is used to control the temperature and force while the solder bumps on the pixel contacts and a bump-bond connection are completed in the reflow oven. The eutectic point of SnPb solder is about 184°C; thus for the hybrid process, it was designed from 184°C to the reflow temperature, which is plus 20°C [44] from the eutectic point.

DETECTOR CHARACTERIZATION AND SELECTED RESULTS
For sensor characterization, we have applied commonly adopted methods, namely, CV/IV probe station measurements, transient current technique (TCT) [45][46][47] measurements, measurements with radioactive sources, and tests for pixel detector modules containing readout chips (ROC) and attached to a data acquisition system (DAQ).
Measurements of the detector full depletion voltage V fd and leakage current I leak were performed using probe stations. In addition, the values of V fd were measured using infrared (IR 1060 nm) laser TCT and extracted from the saturation point of the collected charge (CC). In the TCT measurement, the current generated by the laser pulse is measured from the pixel detector before its interconnection to ROC. For the measurement, the detector is attached to a small auxiliary PCB with conductive glue, and the detector bias rail is wire-bonded to the PCB bonding pad. The signal is collected by attaching a probe needle to the PCB contact pad. (The bonding pad is a bump/FC pad connected to ROC, that is, the signal line. The contact pad is a probe/wirebonding pad for the DC biasing circuit.) See Figure 7 for the results.  The V fd was typically between 40 and 60 V in all the pixel sensors that were measured. The homogeneity of the sensors was characterized by TCT scans using both IR and red lasers. The results are presented in Refs. [21,29,48]. An illustrative example of such a TCT scan is shown in Figure 8.
The TCT scan area in Figure 8 is 5 × 5 mm 2 , covering 100 pixels. The highest amplitude is recorded from the bias rails, where, as indicated in Figure 1, the integrated resistors are connected into the n + -implants. Consequently, the lowest amplitudes originate from the pixels that are covered by aluminum and UBM.
Both electrons and holes contribute to the induced signal current. To investigate the functionality of our AC-coupled pixel detectors, we hybridized the sensor to CMS PSI46dig ROC [49,50] by FC bonding (FCB). For this purpose, under-bump metallization (UBM) based on a TiW/Au metal stack was prepared on the top of sensors. The hybridized detector assemblies were then tested with radioactive sources, often with Am-241, where the 60 keV main gamma-emission peak results in a charge of about 17,000 electrons if the photon is totally absorbed in the silicon. This is close to the charge generated by a minimum ionizing particle, which is 24,000 electrons in 300 µm thick silicon. This measurement is demonstrated in Figure 9.
In the pixel readout system developed by the CMS collaboration, the signal triggering takes place by adjusting the threshold level of the readout. The PSI46dig ROC delivers a calibration charge which is expressed and affiliated as Vcal. One Vcal unit corresponds to roughly 50 electrons (e -). In the case of  the spectrum presented in Figure 9, the Vcal is 100 arbitrary units, that is, equal to 5000 e − , or to 18 keV energy deposition by the incident Am-241 photons, assuming that the silicon ionization energy is 3.6 eV. Thus, the 26 keV k-line escape peak becomes visible in the Am-241 spectrum to the left of the 60 keV main gamma emission peak.

SUMMARY AND CONCLUSION
For over a decade, we have designed, simulated, modeled, and processed AC-coupled pixel sensors on MCz silicon wafers 150 mm in diameter at the Micronova Nanofabrication Centre.
The key principle in our approach is to implement n + /p − /p + silicon pixel detectors, a field insulator with an oxide charge, and bias resistors made of thin-film metal oxide/nitride materials. This field insulator simultaneously serves as the coupling dielectric for the capacitive signal coupling which isolates the elevated leakage current into the DC-biasing circuit.
The ALD-based thin-film deposition process was optimized and repeatedly applied in our detector fabrication process [29,30]. Our scanning TCT measurements indicate good homogeneity over large areas and effective electrical isolation between pixels of high density. The IR 1060 nm TCT and CV measurements show systematically full depletion at the voltage of 40-60 V.
Selected pixel sensors were attached by an SnPb-based FC technology to PSI46dig ASIC chips and further connected to an associated front-end readout and DAQ. Fully assembled detectors were used to measure the gamma radiation spectra emitted by the isotope Am-241. According to our results, we are confident about the functionality of AC-coupled n + /p − /p + pixel detectors with an ALD-grown field insulator and passivation. During the gamma source measurements, the readout and DAQ were set to an electron equivalent triggering threshold of about 5000, allowing the 26 keV AM-241 photopeak to be apparent in the recorded spectrum. Thus, we assume that our pixel sensors would still be operational after the degradation of the charge collection efficiency by 70-80% as a result of the radiation damage induced by heavy hadron irradiation.

DATA AVAILABILITY STATEMENT
The raw data supporting the conclusions of this article will be made available by the authors, without undue reservation.

AUTHOR CONTRIBUTIONS
All authors listed have made a substantial, direct, and intellectual contribution to the work and approved it for publication.