Design and FPGA Implementation of a Pseudo-random Number Generator Based on a Hopfield Neural Network Under Electromagnetic Radiation

When implementing a pseudo-random number generator (PRNG) for neural network chaos-based systems on FPGAs, chaotic degradation caused by numerical accuracy constraints can have a dramatic impact on the performance of the PRNG. To suppress this degradation, a PRNG with a feedback controller based on a Hopfield neural network chaotic oscillator is proposed, in which a neuron is exposed to electromagnetic radiation. We choose the magnetic flux across the cell membrane of the neuron as a feedback condition of the feedback controller to disturb other neurons, thus avoiding periodicity. The proposed PRNG is modeled and simulated on Vivado 2018.3 software and implemented and synthesized by the FPGA device ZYNQ-XC7Z020 on Xilinx using Verilog HDL code. As the basic entropy source, the Hopfield neural network with one neuron exposed to electromagnetic radiation has been implemented on the FPGA using the high precision 32-bit Runge Kutta fourth-order method (RK4) algorithm from the IEEE 754-1985 floating point standard. The post-processing module consists of 32 registers and 15 XOR comparators. The binary data generated by the scheme was tested and analyzed using the NIST 800.22 statistical test suite. The results show that it has high security and randomness. Finally, an image encryption and decryption system based on PRNG is designed and implemented on FPGA. The feasibility of the system is proved by simulation and security analysis.


INTRODUCTION
With the rapid development of digital communication technology, especially in today's increasingly popular smart phones and network communication, more and more people are demanding security for private information [1][2][3][4][5]. Cryptography has been commonly used for fast transmission of information and data and can meet the privacy information security requirements. The secure transmission of information and data relies on the randomness of the security keys of information security systems [6][7][8][9][10]. Therefore, the use of high-quality random sequences as security keys and encrypted data is increasingly common in today's information security systems. In the field of information security, pseudo-random number generators (PRNGs), an important part of stream ciphers, can efficiently generate random sequences with high randomness and sensitivity and improve the security of information security systems [11,12]. At the same time, the development of neural network chaotic systems also provides new theoretical basis and ideas for the design of PRNGs, but some information security problems that may arise are of increasing concern. Thus, the construction of high-performance PRNGs using neural network chaotic systems has been taken as an important topic in the research of information security field.
Chaos is unpredictable, irreducible, and sensitive to initial conditions. In recent years, various constructions of chaotic systems have been proposed [13][14][15][16][17][18]. So far, chaotic systems have been widely used in various fields that already exist, such as synchronization [19][20][21], secure communication [22,23], neural network chaotic systems [24][25][26][27][28][29][30][31][32], and PRNGs [33][34][35][36][37][38]. Among them, PRNGs based on chaotic systems are the most fundamental applications of chaotic systems. However, the performance of RPNG is greatly affected by the chaotic degradation caused by the computational accuracy [39][40][41][42][43][44]. To overcome this problem, Chen et al. [39] proposed a PRNG with three different dimensions of quadratic memory hyperchaotic systems as multiple entropy sources, and the XOR operation was performed on the three different dimensions of the entropy sources, and the generated high-quality random sequences passed the ENT and NIST 800-22 tests. Zhao et al. [40] designed a new hyperchaotic system based on a self-turbulent PRNG, where a feedback controller in the system is used to achieve perturbation of other dimensions, thus avoiding the transient cycle phenomenon and, ultimately, overcoming the chaotic degeneracy arising from computational accuracy problems. As far as the techniques of [39,40] are concerned, these two PRNGs are implemented in software using algorithms based on multi-chaotic systems and feedback controllers for self-perturbation of other dimensions, respectively, to overcome the chaotic degeneracy. However, hardware-based implementations do not guarantee flexible use. All the above mentioned are applications of PRNG based on chaotic systems, while the applications of PRNG based on neural networks have been reported rarely.
In recent years, neural network chaotic dynamics has been extensively studied [45][46][47][48][49]. Therefore, PRNGs based on neural network chaotic systems implemented by FPGAs have attracted the attention of more and more researchers. Dong et al [50] controlled the input and output of the six-dimensional cellular neural network generated by each iteration and performed XOR operations on the random sequences generated by the logic mapping. Ultimately, the period of the output sequence can be extended to improve the transient cycle phenomenon and the randomness and unpredictability of the generated random sequence, and the experimental results passed the NIST statistical test. In [36], a novel chaos-based PRNG was designed using an artificial neural network (ANN)-based 2D chaotic oscillator and a ring oscillator structure. VHDL coding was used to synthesize the chip using the XILINX-ISE design tool, and the generated random sequences passed the NIST-800-22 randomness test, proving that the new FPGA-based value of the existence of PRNGs. In [37], a hardware-oriented Chaotic Boltzmann Machines (CBMs) algorithm, which includes fixed-point and shift operations to reduce the hardware resource utilization of the circuit, is proposed. Thus, CBMs are implemented on FPGA, and the computational speed of the FPGA-implemented CBMs is compared with that of the software-implemented CBMs, proving that the FPGA implementation of CBMs outperforms the other solutions. As far as the hardware implementation is concerned, FPGA use already established logic modules and reprogrammable wiring resources to implement the required hardware functions [50]. At the same time, FPGA can take full advantage of hardware parallelism, enabling more tasks to be performed in a fixed cycle as opposed to sequential execution, reducing design and test cycle costs and increasing the diversity and flexibility of PRNGs based on neural network chaotic systems [37,38]. But so far, there is no research on PRNG of chaos system based on FPGA Hopfield neural network.
In this work, in order to reduce the impact of chaotic degradation caused by FPGA implementation on the quality of random sequence generation and to improve the randomness of random numbers generated by PRNG, a PRNG with a feedback controller based on Hopfield neural network oscillator containing a feedback controller is designed in this paper. Among them, a feedback controller is used to reduce the chaotic degradation phenomenon and improve the quality of random sequences. First, the dynamical behavior of the threeneuron Hopfield neural network system with one neuron exposed to electromagnetic radiation was analyzed, and the neural network model was implemented using FPGA, and the experimental results were consistent with the software simulation results. Second, a PRNG with a feedback controller based on Hopfield neural network oscillator containing a feedback controller was designed to post-process the generated random numbers to generate high-quality random sequences, and compared with PRNG based on Hopfield neural network chaotic oscillator, the randomness and security of random sequence are analyzed. Finally, a PRNG-based image encryption and decryption system was implemented on FPGA, and passed the simulation and security analysis on matlab platform.
The rest of this paper is presented as follows. In Section 2, the mathematical model of the Hopfield neural network chaotic system is analyzed, simulation results of the FPGA-based model are given, and the FPGA implementation is used. In Section 3, the flow structure of the PRNG proposed in this paper is introduced, the PRNG is implemented on FPGA, and the FPGA-based experimental results with chip statistics are out. In Section 4, the randomness and security of the random sequences generated by the PRNG are analyzed. In Section 5, the flow of implementing PRNG-based image encryption and decryption system on FPGA is presented, and the engineering application results are shown. Finally, Section 6 concludes the paper. More and more attention has been paid to the research of multidimensional chaos systems based on Hopfield neural networks. Many different chaotic systems based on Hopfield neural networks have been successfully introduced, such as [24,29]. Recently, Lin et al. [29] proposed a three-neuron Hopfield neural network system with one neuron exposed to electromagnetic radiation. Under different control parameters, the system shows rich chaotic dynamic behavior, and the corresponding lyapunov exponents simulation results further verify this result. This system is given by the following equation In Eq. 1, x, y, z and w are system variables, where x, y, and z represent the membrane voltages of three neurons respectively, x describes the magnetic flux of neurons exposed to electromagnetic radiation, and tanh(i) is a hyperbolic tangent function, which is the neuron activation function and represents the input voltage of neuron i (x, y, z, w). Q(w) is memory conductance of a flux-controlled memristor, which represents the coupling relationship between the coupling of magnetic flux and membrane potential in neurons exposed to electromagnetic radiation. α and β are two electromagnetic radiation parameters. Therefore, Eq. 1 represents the state equation of three neuron Hopfield neural network, where neuron x is exposed to electromagnetic radiation.

Discrete Model of System
The discretization process of the neural network model is the key to realize the neural network model on FPGA. According to the equation obtained after the discrete processing, we can determine the number of registers, adders, subtractors, multipliers, comparators, and other modules needed in the hardware implementation. In this study, the whole discretization process is accomplished by RK4 numerical algorithm. The mathematical equation of this numerical algorithm is given by Eq. 3.
Kx4 Δh − x1(i) + Kx 3 − 3.5 tanh y(i) + 0.5 tanh(z(i)) + 2.5 x1(i) + Kx 3 (0.24 − 0.7|w(i)|) , Ky1 Δh − y(i) + 0.7 tanh(x(i)) + 3.4 tanh y(i) − 1.6 tanh(z(i)) Ky2 Δh − y(i) + Kx 1 2 + 0.7 tanh(x(i)) + 3.4 tanh y(i) + Ky 1 2 − 1.6 tanh(z(i)) Ky4 Δh − y(i) + Kx 3 + 0.7 tanh(x(i)) + 3.4 tanh y(i) + Ky 3 − 1.6 tanh(z(i)) , where the step size of each iteration is Δh 0.001, and K j1 , K j2 , K j3 , K j4 (j x, y, z, w) respectively represent the slopes of four points in one iteration. In an iterative process, (x(i), y(i), z(i), w(i)) provide data for the system, while (x(i + 1), y(i + 1), z(i + 1), w(i + 1)) obtain data to provide data for the next iteration. In Eq. 1, the hyperbolic tangent function, which is superior to the sigmoid activation function, is taken as the neuron activation function. Look-up table has always been a traditional way to realize the hyperbolic tangent function, but its implementation on FPGA is very challenging due to the limitation of hardware quantity. Kwan et al. [49] introduced a simple sigmoid-like second-order piecewise activation function, which can be implemented directly in hardware and is close to hyperbolic tangent function. Therefore, the tanh-like bipolar function and the simple sigmoid-like secondorder piecewise function are given by Here μ 1 and θ 0.25 represent the slope and gain of H s (i), and L 2 determines the length of the middle area. Eq. 3, Eq. 4 and Eq. 5 provide a guarantee for the implementation of neural network system model on FPGA with RK4 numerical algorithm.

Dynamic Analysis of the System
In this paper, because the ODE45 function on the Matlab platform is basically the same as the RK4 algorithm in the discrete process, the dynamics analysis of the neural network chaotic system is completed on the Matlab platform on the basis of the ODE45 function and Eq. 4.
When the system parameters are set as a 3.5, b 0.5, c 2.5, d 0.7, e 3.4, f 1.6, g 0.95, h 2.5, m 1.9, n 1.5, α 0.24, β 0.7 and the initial condition is selected as (0.1, 0.1, 0.1, 0.1). The step size of each iteration is Δh 0.001. The Lyapunov exponential spectrum of Eq. 1 with respect to parameter a, as shown in Figure 1. It is clear from the Figure 1A that there is a positive Lyapunov exponent in the system and that when a 3.5, the Lyapunov exponent is 675. It can be seen from Figure 1B that on the lyapunov exponent, LE 1 is greater than 0, LE 2 is equal to 0, LE 3 and LE 4 are less than 0. When a dynamical system obtains a correct initial condition, the orbit of the system tends to a certain steady state as time passes. This special steady-state is called the attractor of the system. In this paper, the phase diagram of the system is simulated by Matlab which is shown in Figure 2. Figure 3 shows the time series of state variables x and w. In order to further explore the dynamic behavior of neural network chaotic system, when the parameters of neural network chaotic system remain unchanged, the attractor basin of its initial state change is considered to verify the multi stability of the system. Setting the initial state of x and z as 0, we can draw the attractors of y and w initial plane, in which red, blue and yellow represent different types, different structures and different amplitudes of attractors.
Similarly, the basins of attraction of the initial planes x and z can be drawn in the graph, as shown in Figure 4. Therefore, the Hopfield neural network chaotic system has rich dynamic behavior.

Implementation of Hopfield Neural Network System on FPGA
In this paper, a three-neuron Hopfield neural network system with neuron x exposed to electromagnetic radiation is implemented on the Vivado 2018.3 design platform, and the required modules, such as adders, subtractors, multipliers and comparators, are obtained or created using the IP-CORE generator developed for the platform. The source files of the RK4 numerical algorithm and Eq. 1 are constructed using the required modules and Verilog HDL hardware language under IEEE 754-1985 high precision 32-bit floating point standard. The flow block diagram of the FPGA-based neural network chaotic oscillator has been shown in Figure 5.
As shown in Figure 5, the Hopfield neural network chaotic oscillator has four input signals and five output signals. Start and Clk are 1-bit input signals, which are used to synchronize each module unit. Δh and the initial value (X 0 , Y 0 , Z 0 , W 0 ) are both 32-bit input signals, where Δh 0.001 is a parameter representing the step size. These two input signals are obtained from the outside and can be easily modified. The four 32-bit output signals (X Out, Y Out, Z Out, W Out) are input to the floating to fixed unit and used as the initial values of the next iteration of the Hopfield neural network chaotic oscillator. The floating to fixed unit converts the input 32-bit floating point number into 14-bit fixed-point number. The DAC unit converts the output signal of the floating to fixed unit into an analog signal, and then outputs the analog signal (x, w) to Xilinx ZYNQ-XC7Z020 chip. The validity of the output signals (x, w) is determined by the XYZW Ready signal of 1-bit. The simulation result of vivado simulator are shown in Figure 6. Then, the Xilinx ZYNQ-XC7Z020 chip is connected to the computer and oscilloscope respectively, and the bitstream file generated by vivado2018.3 platform is transmitted to the chip. The result of oscilloscope is shown in Figure 7. The results show that the phase diagram of the Hopfield neural network with neuron x exposed to electromagnetic radiation based on FPGA is consistent with its MATLAB simulation phase diagram, which verifies the validity of the FPGA.

Design of PRNG
In this part, PRNG based on three-neuron Hopfield neural network with neuron x exposed to electromagnetic radiation is composed of entropy source, feedback controller unit, sampling quantization unit and post-processing unit. The structure of PRNG is shown in  Therefore, in order to solve the chaotic degradation problem brought by FPGA implementation, the magnetic flux w of neuron x is used as a judgment condition in the feedback controller to selectively interfere with neuron x. The specific steps are as follows.   Step 1. Acquire the 32-bit output signal of the magnetic flux W OUT and the 32-bit output signal of the neuron X OUT.
Step 2. Take the 16th and 17th bit of W OUT for XOR operation to get 1-bit output w′. If w′ is equal to 1, let X 1 OUT X OUT + 0.0002; Otherwise, let X 1 OUT X OUT − 0.0002.
The output of the feedback controller is given to the sampling quantization unit and used as the input value of the next iteration of the Hopfield neural network oscillator. By using this feedback controller, the period of the random sequence generated by the PRNG can be greatly extended, and the quality of the pseudo-random sequence can be improved.
In the sampling quantization unit, according to ieee 754-1985 high-precision 32-bit floating-point standard, in each iteration, bits between 0 and 15 are taken from the four output signals (X 1 OUT, Y 1 OUT, Z 1 OUT, W 1 OUT) of the feedback controller unit, and four random sequences (X, Y, Z, W) are obtained by quantization. These four random sequences form a random sequence in order from the first to the fourth dimensions and output the random sequence to the postprocessing unit. The post-processing unit can greatly improve the randomness of the random sequence. In this paper, the initial state of the post-processing unit is shown in Figure 9, which consists of 32 registers and 15 XOR comparators. Among them, the first 16 registers are all 0, and the last 16 registers  (k 0 , k 1 , k 2 , /, k 14 , k 15 ) are obtained from the random sequence output by the sampling quantization unit in order. The registers are shifted forward one bit at a time, and the XOR operation is completed sequentially. Eventually, every 16 shifts, the last 16-bit of the registers need to be added from the random sequence again. 15 XOR comparators will self-XOR the first 16-bit to generate a 1-bit random number. Until all random sequences are post-processed. Thus, the PRNG generates 64-bit random numbers in each iteration.

FPGA Implementation of PRNG
On the Vivado 2018.3 platform, the simulation results of Hopfield neural network based chaotic oscillator PRNG with feedback controller proposed in this paper on FPGA are shown in Figure 10. Completed by Verilog HDL code. According to the implementation time report, FPGA runs at a clock frequency as high as 109.337 MHz, with a minimum running period of 9.146 ns. The data rate of PRNG can reach 16.20 Mbit/s. Table 1 shows the statistics of Xilinx ZYNQ-XC7Z020 chip of PRNG based on FPGA. Finally, the generated bitstream file is output to the oscilloscope, as shown in Figure 11.

Dynamical Degradation
In hardware implementation, chaos degradation caused by calculation accuracy will greatly affect the randomness of PRNG. For example, the short period phenomenon may appear in chaotic simulation, which results in periodicity of random sequence, and finally leads to the failure of random sequence test. At present, NIST 800.22 test suite is the most commonly used randomness test standard, which can use 15 test methods to evaluate a large number of random sequences. Therefore, to determine the randomness of the PRNG with a feedback controller based on the Hopfield neural network chaotic oscillator, we tested its generated random sequences using the NIST 800.22 test suite. In this paper, the PRNG discarded the first 50,000 bits of the random sequence and put the resulting 100 1-MIT test random sequences into the NIST 800. 22

Key Space Analysis
The size of key space is an important index to determine the security of encryption system, and it is very important to choose the right key space. Large key space can improve encryption strength and better resist key analysis. The small key space can not resist exhaustive attack, and the password is easier to be cracked. Usually, when the key space is greater than 2 128 , the security of the cipher system can be ensured and the exhaustive attack can be resisted. In this paper, the Hopfield neural network chaotic oscillator and a feedback controller are used to construct PRNG. According to the IEEE 745-1985 floating point standard, the system key consists of the initial conditions (x 0 , y 0 , z 0 , w 0 ) and the system parameters (a, b, c, d, e, f , g, h, m, n, α, β) of the Hopfield neural network chaotic oscillator, totally 512-bits. Therefore, the key space of the system is 2 512 , which is much larger than 2 128 , and there is enough space to resist the exhaustive attack.

Key Sensitivity Analysis
It is well known that chaotic systems are very sensitive to parameters and initial conditions. Therefore, the proposed PRNG with feedback controller based on Hopfield neural network chaotic oscillator should maintain the same sensitivity. Key sensitivity test is used to analyze the impact of small changes in initial conditions or parameters on the corresponding output. When PRNG has high sensitivity, small changes in the input will lead to huge differences in the corresponding output. In this test, the initial conditions (x 0 , y 0 , z 0 , w 0 ) (0.1, 0.1, 0.1, 0.1) and parameters (a 3.5, b 0.5, c 2.5, d 0.7, e 3.4, f 1.6, g 0.95, h 2.5, m 1.9, n 1.5, α 0:24; β 0:7) of the chaotic system are input into the proposed PRNG to generate a 10 6 bits reference pseudo-random sequence S 1 , and then the initial conditions and parameters are slightly changed as follows. Frontiers in Physics | www.frontiersin.org June 2021 | Volume 9 | Article 690651 1) By modifying the initial condition x 0 0.1 to x ′ 0 0.1 + 10 −8 a new test pseudorandom sequence S 2 with 10 6 bits is obtained. 2) By changing the parameter a 3.5 to a ′ 3.5 + 10 −8 , a new test pseudo-random sequence S 3 with 10 6 bits is obtained.
The bit change rate has always been considered as an important index to measure the sensitivity of PRNG. The closer the bit change rate is to 50%, the higher the key sensitivity of PRNG. The formula of the corresponding bit change rate is as follows: where p and N represent the bit change rate and sequence length, S a(k) and S b(k) represent the bit values of the kth bit of the reference random number sequence S a and the test random number sequence S b . In this paper, S 1 is compared with S 2 and S 3 respectively, and the bit change rate obtained is shown in Table 3. As can be seen from the table, when the input initial conditions and parameters of the Hopfield neural network chaotic oscillator with feedback controller PRNG increase by only 10 −8 , the bit change rate is very close to 50%. This shows that PRNG is highly sensitive to initial conditions and parameters, and can meet the requirements of security applications. When the initial input condition x 0 and parameter a change by 10 −8 , the time-domain waveform of chaotic oscillator neuron x of the Hopfield neural network disturbed by the feedback controller is shown in Figure 12. Figure 12A shows the time domain diagram of neuron x when only initial condition x 0 changes, and Figure 12B shows the time domain diagram of neuron x when only parameter a changes. Thus, the chaotic oscillator of Hopfield neural network disturbed by the feedback controller is very sensitive to the initial conditions and parameters.

Correlation Analysis
Auto-correlation and cross-correlation analysis are important methods to detect the correlation between two random sequences of equal length. Among them, auto-correlation is used to detect the random sequence and its shifted sequence, and cross-correlation is used to detect adjacent test random sequences. Now there are two adjacent random sequences X {X 1 , X 2 , /, X n } and Y {Y 1 , Y 2 , /, Y n }, X i and Y i denote the random numbers in the random sequences X and Y, i {1, 2, 3, /, n}. So the calculation formula of correlation is shown in Eq. 7.
where the correlation coefficient R XY ∈ (−1, 1) . The closer the R XY is to 0, the more independent the sequence is, and the closer the R XY is    Yi n . The calculated correlation coefficient R XY 2.07 × 10 −4 , so it can be considered that there is no correlation between the two test random sequences. Autocorrelation detection and cross-correlation detection are shown in Figure 13. Figure 13A shows the auto-correlation between test random sequences and its shifted sequences generated by 15 keys, and Figure 13B shows the cross-correlation between test random numbers generated by 15 adjacent keys. It can be seen from the figure that there is no correlation between pseudo-random sequences generated by PRNG proposed in this paper.

DESIGN AND IMPLEMENTATION OF IMAGE ENCRYPTION AND DECRYPTION SYSTEM BASED ON PRNG
In recent years, image and video encryption based on chaotic system has been widely studied and applied [51][52][53][54][55][56]. As the main application of chaotic system, PRNG has been paid more and more attention in the field of image encryption [57][58][59]. At the same time, FPGA also provides strong support for the engineering application of chaotic system [60]. Therefore, as the basis of different engineering applications based on PRNG, FPGA has been paid more and more attention. It is understood that the PRNG with feedback controller based on Hopfield neural network chaotic oscillator proposed in this paper has a complex mathematical model and requires a large amount of chip resources in FPGA implementation. Currently, there is no image encryption system based on this PRNG implemented by FPGA.

System Simulation
In this section, we propose an image encryption system based on the pseudo-random sequences generated by PRNG, and complete the simulation and security analysis on matlab platform. The   Frontiers in Physics | www.frontiersin.org June 2021 | Volume 9 | Article 690651 encryption and decryption scheme of the image encryption system is as follows: Step 1: A 256 × 256 24-bit depth true color image "Baboon" is selected as the original plaintext image p, and the 256 × 256 24bit pixels are divided into three 256 × 256 8-bit depth R, G and B pixel channels.
Step 2: The generation of the key sequence used for encryption is consistent with our previous work. In each iteration, a 64-bit random sequence will be generated and the last 8 bits of the random sequence will be kept and added to the key sequence. Finally, three 256 × 256 8-bit key sequences S 1 , S 2 and S 3 are generated.
Step 3: We get the R, G and B pixel channels from step 1 and the key sequence S 1 , S 2 and S 3 from step 2 for XOR processing, that is, the pixel channels of the encrypted image are R 1 R⊕S 1 , G 1 G⊕S 2 , B 1 B⊕S 3 . The reverse process of encryption is the decryption process.
The experimental results of encrypting the original plaintext image p using key sequences S 1 , S 2 and S 3 are shown in Figure 14. Figures 14A,B represent the original image and the encrypted image, respectively. When the encrypted image has the correct key sequence, the original image can be obtained, as shown in Figure 14C.

Security Analysis
In this section, we will conduct a security analysis to evaluate the proposed image encryption and decryption system. Security analysis includes histogram analysis, correlation analysis, differential key attack analysis, and entropy analysis. The master key consists of parameters a 3.5, b 0.5, c 2.5, d 0.7, e 3.4, f 1.6, g 0.95, h 2.5, m 1.9, n 1.5, α 0.24, β 0.7 and initial conditions (0.1, 0.1, 0.1, 0.1). Set the PRNG step Δh 0.001 and iterate (3 × 256 × 256 + 500) times. Finally, the results discard the results of the first 500 iterations.
1) Histogram analysis: The intensity of the distribution of the image pixel values can be known from the histogram. In general, the ideal histogram distribution should be uniform. Therefore, a high-security image encryption and decryption system can make the encrypted image have the ideal histogram distribution. The histograms of the original   Figures 15E-H, respectively. The results show that the histogram of the encrypted image is the ideal histogram distribution, which prevents the attacker from obtaining information from the histogram.
2) Correlation analysis: The quality of the image encryption and decryption system is related to the correlation between adjacent pixels of the encrypted image. The adjacent pixels of the original plaintext image have a high correlation. Therefore, a good image encryption and decryption system can effectively reduce the correlation coefficient between adjacent pixels. In this experiment, we randomly selected 10,000 pairs of adjacent pixels in the horizontal, vertical and diagonal directions to calculate the correlation coefficients of the original plaintext image and the encrypted image. The correlation coefficients can be calculated by Eq. 7, and the results are shown in Table 4. The results show that the system has the ability to resist statistical attacks.
3) Differential key attack analysis: Differential key attack analysis is an important method to evaluate the resistance of image encryption and decryption systems to attacks. Among them, number of pixel change rate (NPCR) and unified average changing intensity (UACI) are used as metrics for the analysis. Suppose we generate two key sequences S 1 and S 2 respectively using the correct key and the wrong key with the parameter increased by 10 −8 . The original plaintext image is encrypted by S 1 and S 2 to obtain two encrypted images T 1 and T 2 , and the pixel values of T 1 and T 2 are represented by T 1 (i, j) and T 2 (i, j). the mathematical formulas of NPCR and UACI are given by Eqs. 8-10 Where, N and M denote the number of pixels in the width and length of the encrypted image. The calculation results are shown in Table 5, and the results are ideal. 4) Entropy analysis: Judging the security of an image encryption and decryption system requires the help of information entropy. When the information entropy of an encrypted image is close to 8, we say that it achieves the ideal information entropy and indicates that the encryption and decryption system has good security. The formula for calculating information entropy is as follows.
The results are shown in Table 6, and the entropy value of the encrypted image is close to 8, reaching the ideal information entropy.

FPGA-Based Image Encryption and Decryption System
In this section, we design and implement a PRNG with a feedback controller image encryption system based on the Hopfield neural network chaotic oscillator on FPGA. All experiments also adopt 32-bit IEEE 754-1985 floating-point standard, design and simulation on Vivado 2018.3 platform using Verilog HDL hardware language and developed IP-core generator, and finally, completed on Xilinx Zynq-XC7Z020 chip. The key sequence generation and image encryption and decryption processes are consistent with the simulation process. Figure 16. is the flow chart of implementing PRNG based image encryption system on FPGA. As shown in Figure 16, the image encryption system on FPGA consists of four parts: chip data RAM, the key sequence, data encryption module and VGA display controller. Where the image data and random sequence accessed in the chip are provided by the software Image2Lcd and the PRNG proposed in this paper, respectively. The encrypted image data will be stored in the chip and processed with the random sequence again. The image decryption system consists of three modules: the key sequence, the data decryption module and the VGA display controller. In this experiment, the Image2Lcd software is used to divide the 256 × 256 24-bit depth true color image "Baboon" into three 256 × 256 8-bit data and store them in the chip data RAM. In the data encryption module, the image data is XORed with the random sequence, and the calculated data is transmitted to the display through the VGA display controller to complete the image encryption. Figure 17. shows the experimental results based on FPGA. As shown in Figure 17A, the encrypted image is obtained by processing the data of the original image and the key sequence. Figure 17B shows that when the encrypted image data is processed with the correct key sequence, the original image before encryption can be obtained. The experimental results verify the value of the proposed PRNG in engineering application.

CONCLUSION
In this paper, a PRNG with a feedback controller based on the improved Hopfield chaotic neural network oscillator is proposed and well implemented on FPGA. Among them, the magnetic flux of neurons is taken as the judgment condition, and the feedback controller is used to add the corresponding interference factor to the neurons with the highest Lyapunov exponent, so as to reduce the influence of chaos degradation on the generated random numbers and improve the randomness of the random sequence. The post-processing unit consists of 32 registers and 15 XOR comparators. From the chip statistics, it can be seen that the PRNG can be implemented on FPGA and the output data rate can be up to 16.2 Mbit/s. The performance of the PRNG was tested. The security analysis and FPGA implementation of the image encryption and decryption system based on PRNG show that PRNG has good randomness and engineering application value. Existing feedback controllers and post-processing algorithms will be improved in the future to further improve the randomness of the PRNG and reduce the impact of chaotic degradation.