Research Topic

Advances in 3-Dimensional Integrated Circuits for Future Computing

About this Research Topic

With the growing demand for data-driven applications such as the next-generation machine learning and neuromorphic computing, the traditional 2D integrated circuits based on von-Neumann architecture with disjoint memory and processing units will find efficient computing challenging due to limited communication bandwidth, this is further intensified by the slowdown of transistors scaling and Moore law which fueled the development of digital electronics in the past. Therefore, it is necessary to develop more-than Moore devices as well as new system architectures and algorithms to tackle this challenges.

Significant advancements in the development of more-than Moore memory devices (e.g. PCRAM, MRAM, RRAM, FERAM) and logic transistors (e.g. FinFET, GAAFET, SET) have been reported. These emerging devices are based on beyond-Si materials and include low-dimensional materials such as quantum dots, nanowires, carbon nanotubes, 2-D transition metal dichalcogenides, and metal oxides. This unveils their potential as next generation electronic materials with great potential for 3D integrated electronics. Despite so, industry implementations have been limited due to 1) unsatisfactory devices’ performance, 2) lack of process integration technology, 3) design technology co-optimization between that of hardware (device, circuits, architectures) and software algorithms, and 4) advanced packaging techniques to integrate various modules together.

Further effort in developing these areas will help positioning these materials in as viable and efficient options for industry applications.

3D integration of logics and memories into new computing architecture has great potential to improve both communication bandwidth and devices' areal density. New suitable materials for 3D integration must complement the tradition Si low processing temperature that allows integration beyond CMOS BEOL, as well as facilitate circuit architectures to fully exploit their functionalities.

This Research Topic intends to contribute to a better understanding of the optimization methods for low-temperature semiconductor materials, the fabrication techniques for monolithic 3D integration, suitable packaging techniques for 3D integration, the enhancement of emerging memories performance, as well as novel control circuits and algorithms for 3D devices. The contents of this collection will contribute to the fields of materials science, devices reliability, circuits development and packaging.

This Research Topic welcomes Original Research, Reviews and perspective articles on themes like:

- Fabrication and characterization of Low temperature semiconductor devices, including logics and memories

- Synthesizing of high-performance semiconductor processable at low temperature (2D, oxides)

- 3D integration techniques for high density memories

CMOS logic circuits beyond Si BEOL

- Advanced 3D packaging

- Algorithms for 3D memories computing

- Control circuits for 3D memories computing


Keywords: 3D Integrated Circuits, Future Computing, Low Temperature Semiconductor Devices, 2D oxides, CMOS, Si BEOL


Important Note: All contributions to this Research Topic must be within the scope of the section and journal to which they are submitted, as defined in their mission statements. Frontiers reserves the right to guide an out-of-scope manuscript to a more suitable section or journal at any stage of peer review.

With the growing demand for data-driven applications such as the next-generation machine learning and neuromorphic computing, the traditional 2D integrated circuits based on von-Neumann architecture with disjoint memory and processing units will find efficient computing challenging due to limited communication bandwidth, this is further intensified by the slowdown of transistors scaling and Moore law which fueled the development of digital electronics in the past. Therefore, it is necessary to develop more-than Moore devices as well as new system architectures and algorithms to tackle this challenges.

Significant advancements in the development of more-than Moore memory devices (e.g. PCRAM, MRAM, RRAM, FERAM) and logic transistors (e.g. FinFET, GAAFET, SET) have been reported. These emerging devices are based on beyond-Si materials and include low-dimensional materials such as quantum dots, nanowires, carbon nanotubes, 2-D transition metal dichalcogenides, and metal oxides. This unveils their potential as next generation electronic materials with great potential for 3D integrated electronics. Despite so, industry implementations have been limited due to 1) unsatisfactory devices’ performance, 2) lack of process integration technology, 3) design technology co-optimization between that of hardware (device, circuits, architectures) and software algorithms, and 4) advanced packaging techniques to integrate various modules together.

Further effort in developing these areas will help positioning these materials in as viable and efficient options for industry applications.

3D integration of logics and memories into new computing architecture has great potential to improve both communication bandwidth and devices' areal density. New suitable materials for 3D integration must complement the tradition Si low processing temperature that allows integration beyond CMOS BEOL, as well as facilitate circuit architectures to fully exploit their functionalities.

This Research Topic intends to contribute to a better understanding of the optimization methods for low-temperature semiconductor materials, the fabrication techniques for monolithic 3D integration, suitable packaging techniques for 3D integration, the enhancement of emerging memories performance, as well as novel control circuits and algorithms for 3D devices. The contents of this collection will contribute to the fields of materials science, devices reliability, circuits development and packaging.

This Research Topic welcomes Original Research, Reviews and perspective articles on themes like:

- Fabrication and characterization of Low temperature semiconductor devices, including logics and memories

- Synthesizing of high-performance semiconductor processable at low temperature (2D, oxides)

- 3D integration techniques for high density memories

CMOS logic circuits beyond Si BEOL

- Advanced 3D packaging

- Algorithms for 3D memories computing

- Control circuits for 3D memories computing


Keywords: 3D Integrated Circuits, Future Computing, Low Temperature Semiconductor Devices, 2D oxides, CMOS, Si BEOL


Important Note: All contributions to this Research Topic must be within the scope of the section and journal to which they are submitted, as defined in their mission statements. Frontiers reserves the right to guide an out-of-scope manuscript to a more suitable section or journal at any stage of peer review.

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Submission Deadlines

17 December 2021 Manuscript

Participating Journals

Manuscripts can be submitted to this Research Topic via the following journals:

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Topic Editors

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Submission Deadlines

17 December 2021 Manuscript

Participating Journals

Manuscripts can be submitted to this Research Topic via the following journals:

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