Toward next-generation artificial intelligence hardware

Efficient artificial intelligence (AI) hardware is crucial for resource-constrained applications such as healthcare and transportation, where it enhances performance, reduces costs, and supports real-time decision-making.

Overcoming the memory wall in traditional hardware is critical for enhancing AI computational efficiency, reducing latency, and enabling faster, more effective processing of complex algorithms.

Compute-in-memory (CIM) paradigms using different memory technologies, such as embedded non-volatile memory (eNVM), static random-access memory (SRAM), dynamic random-access memory (DRAM), and flash memory, help develop energy-efficient AI hardware by tackling the memory wall problem.

Stochasticity in AI algorithms (e.g., via spike timing-dependent plasticity or STDP) and hardware (e.g., via spin–orbit transfer magnetic tunnel junctions or SOT-MTJs) can be leveraged to improve energy efficiency for diverse workloads and could unlock novel capabilities.

Co-designing hardware and algorithms to optimize energy, latency, and accuracy will lead to the development of a “converged platform” for artificial neural networks (ANNs) and spiking neural networks (SNNs), suitable for diverse AI applications.