The field of transistor technology is approaching a critical juncture as silicon transistors near their physical scaling limits. This has encouraged significant interest in the exploration of emerging nanomaterials that promise to enhance performance and reduce power consumption for next-generation transistors. Materials such as two-dimensional compounds—graphene, transition metal dichalcogenides (TMDs), and hexagonal boron nitride (h-BN)—alongside carbon nanotubes, and oxide semiconductors, offer unique physical and electrical properties. These attributes can potentially overcome the downscaling limitations inherent in traditional silicon transistors and allow for the development of novel architectures like monolithic 3D integration. These innovations pave the way for more energy-efficient and powerful electronic devices and systems. However, integrating these novel materials presents challenges, including issues with contact resistance, gate dielectric interfaces, defects, and reliability. Solving these issues is crucial for the transition from laboratory research to fab-scale manufacturing.
This Research Topic aims to tackle the challenges associated with designing, fabricating, characterizing, and applying next-generation transistors that utilize novel nanomaterials, such as two-dimensional materials, carbon nanotubes, and oxide semiconductors. Furthermore, this initiative seeks to explore the adoption of nanoscale transistors across a range of emerging applications, including sensors, BioFETs, displays, wireless communications, and flexible electronics, thus fostering interdisciplinary progress within nanotechnology and electronics.
To gather further insights into the emerging field of transistor technology, we welcome articles that focus on, but are not limited to, the following themes:
• Synthesis and characterization of nanomaterials for transistor applications
• Novel fabrication processes for 2D, carbon nanotube, and oxide-based transistors
• Device scaling for next-generation transistor technologies
• Innovative device architectures for nanoscale transistors
• Device physics and reliability concerns of nanoscale transistors
• Strategies for defect, gate dielectric, and contact engineering
• 3D integration and thermal management techniques
• Application-driven research utilizing nanoscale transistors across various emerging electronics fields
We encourage the submission of original research articles, reviews, and perspective papers that contribute to advancing this dynamic area of study.
Article types and fees
This Research Topic accepts the following article types, unless otherwise specified in the Research Topic description:
- Brief Research Report
- Editorial
- FAIR² Data
- Methods
- Mini Review
- Original Research
- Perspective
- Review
- Technology and Code
Articles that are accepted for publication by our external editors following rigorous peer review incur a publishing fee charged to Authors, institutions, or funders.
Keywords: o-dimensional materials, carbon nanotubes, oxide semiconductors, transistor scaling, 3D integration, thermal management, contact resistance, gate dielectric, interface defects, reliability, sensor, BioFET, display, flexible electronics
Important note: All contributions to this Research Topic must be within the scope of the section and journal to which they are submitted, as defined in their mission statements. Frontiers reserves the right to guide an out-of-scope manuscript to a more suitable section or journal at any stage of peer review.
