Enhanced Electrical Stability of IGZO Thin-Film Transistors Using Atomic Layer Deposited Al2O3/HfO2 Dual-Layer Gate Insulator

Shaocong Lv¹Weilin Wang¹Shuaiying Zheng¹Chengyuan Wang¹Qian Xin¹Yuxiang Li¹Aimin Song^2,3Jaekyun Kim⁴Jidong Jin^4*Jiawei Zhang^1*

• ¹Shandong Technology Center of Nanodevices and Integration, School of Integrated Circuit, Shandong University, Jinan, China
• ²Department of Electrical and Electronic Engineering, The University of Manchester, Manchester, United Kingdom
• ³Institute of Nanoscience and Applications, Southern University of Science and Technology, Shenzhen, China
• ⁴Department of Photonics and Nanoelectronics, Hanyang University, Seongdong-gu, Republic of Korea

This study investigates the stability of positive bias temperature stress (PBTS) in bottom-gate indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) incorporating atomic layer deposited Al2O3/HfO2 dual-layer gate insulators (GIs). By optimizing the thicknesses of the Al2O3 and HfO2, hydrogen diffusion from the GI into the IGZO layer is effectively controlled and electron traps at the IGZO/GI interface are mitigated. The optimal dual-layer GI configuration for IGZO TFTs is identified as 15 nm Al2O3 on 5 nm HfO2, resulting in an exceptionally low threshold voltage shift of −0.02 V under PBTS at 125 ℃ for 104 s. Additionally, the device exhibits excellent electrical performance, with a saturation mobility of 11.61 cm2/Vs, a subthreshold swing of 114 mV/dec, and a threshold voltage of −0.23 V. These results highlight the potential of IGZO TFTs with dual-layer GIs for advanced integrated circuit applications.